The invention relates to a method of forming at least one narrow groove in a substantially uniform layer of a first material, in which the width of the groove is determined in a self-registered manner.
The invention more particularly relates to the manufacture of a semiconductor device by means of such a method.
The invention also relates to a device manufactured by means of a method according to the invention.
When designing semiconductor devices, increasingly higher integration densities are aimed at on the one hand in order to be able to realize an increasing number of functions on the same surface and on the other hand in order to be able to obtain higher yields in the manufacture due to the smaller surface area of the circuit to be manufactured. Especially due to the rise of microprocessors and mini-computers, increasingly more stringent requirements are imposed with respect to high speed and small dimensions of the circuit elements. Consequently, increasingly more stringent requirements are imposed on the minimum dimensions to be realized, such as track widths of metallization patterns, relative distances of contact holes, minimum widths of insulation regions etc.
Since these dimensions are determined for the major part by the masking techniques used, there is an increasing interest in finding methods, in which these dimensions are not dependent upon optical resolution; and especially self-registered techniques are to be preferred.
A method of the kind mentioned in the opening paragraph is known from British Patent Application No. 2,111,304 A. In this case, a groove of submicron dimensions is formed in a self-registered manner in a substrate region, such as, for example, a semiconductor substrate. Semiconductor elements, such as, for example, transistors are then provided in substrate regions mutually separated by insulation regionns defined by means of these grooves. However, again photolithographic methods are used.
Besides, in one of the embodiments, the width of the ultimate groove is determined by oxidation of two different layers, whose relative distance is determined in the first instance by lateral oxidation of one of the layers. Due to alignment tolerances, transistors manufactured by means of this method are bound to certain minimum dimensions.
A method according to the invention is characterized in that a substrate region is provided at a major surface with a first masking layer having at least one opening or depression and the surface is provided at least at the area of the opening and on an adjoining part of the masking layer with a substantially uniform layer of the first material having a depression at the area of the opening, while the layer of the first material is covered by a substantially uniform layer of a second masking material and a substantially uniform layer of a first convertible material, and in that within the original opening in the first masking layer the depression in the layers of the second masking material and the first convertible material is maintained and selective conversions, such as by ionic implantations, for example, of the first layer of convertible material is effected for the formation of an intermediate mask, by means of which an opening is formed at least along the inner edge of the depression in the layer of the second masking material, after which the groove in the layer of the first material is obtained by means of the mask thus formed in the layer of the second masking material.
A substantially uniform layer is to be understood herein to mean a layer having substantially the same thickness throughout its area except areas at which an unevenness, such as, for example, a step, is present in the subjacent layer and the uniform layer has the same profile as the subjacent layer.
The term opening or depression is not necessarily to be understood to mean an opening in the first masking layer, which is surrounded on all sides by this masking layer. A masking layer may also be used which exposes the substrate region.
The invention is based on the recognition of the fact that, when such a groove is formed along the edge of the opening, especially in semiconductor devices, such as integrated circuits, semiconductor zones, such as, for example, an emitter and base-connections having extremely small dimensions (in the submicron range) can be formed within this opening in the layer of the first material, which may be, for example, polycrystalline silicon.
The intermediate mask may be formed, for example, by choosing for the first convertible layer a semiconductor material which is converted into oxide at least along a part of, the inner edge of the depression by means of local oxidation which oxide is then removed so that the remaining semiconductor material constitutes the intermediate mask.
Preferably, however, the first convertible layer is covered by a substantially uniform layer of a third masking material, which is subjected to an anisotropic etching treatment, and a third masking layer, which protects the first convertible layer against conversion, remains at least along the inner edge of the depression on the first convertible layer.
Depending upon the materials used, various forms of conversion are possible, such as, for example, local oxidation or silicidation, after which the non-converted part is removed.
A preferred embodiment of the method according to the invention is characterized in that the first convertible layer comprises polycrystalline semiconductor material, which is converted along the inner edge of the depression by means of a doping step into highly doped semiconductor material. The highly doped semiconductor material is substantially not attacked when the original semiconductor material is etched.
In a particular advantageous embodiment of the method according to the invention, the second masking layer may even coincide with the first convertible layer. Such a method is characterized in that a substrate region is provided at a major surface with a first masking layer having at least one opening and in that the device is provided at least at the area of the opening and on an adjoining part of the masking layer with a substantially uniform layer of a first material having a depression at the area of the opening, while the layer of the first material is covered by a substantially uniform layer of a second masking material with, the depression being maintained within the original opening in the first masking layer and selective conversion of the second masking layer being effected, in which at least along the inner edge of the depression, the second masking layer is etched while the remaining part of the second masking layer remains so that, after this part which is etched has been removed, a mask is obtained by means of which the groove is formed in the layer of the first material.
By means of the method according to the invention, various kinds of transistors and circuits can be realized in semiconductor materials, for example by forming depressions in the substrate region in the manner described in the aforementioned British Patent Application, while using the uniform layer of the first material with grooves formed therein as a mask.
Another method of manufacturing a semiconductor body is characterized in that the first material comprises a semiconductor material and the second masking material comprises an oxidation-preventing material, while after etching the groove down to the surface, the oxidationpreventing material located outside the depression is removed and the semiconductor material is oxidized over such a distance that the groove is filled entirely or in part with oxide.
Thus, a semiconductor region of extremely small dimensions enclosed by a groove can be formed, which defines, for example, in a bipolar transistor the size of the emitter zone and the base connection, or defines in a field effect transistor the size of a connection contact of the source zones and the gate electrodes.
Furthermore, quite different devices, such as, for example, a capacitor, can be manufactured by means of the method according to the invention.